First commit.
This commit is contained in:
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#ifndef __INC_CLOCKLESS_ARM_KL26
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#define __INC_CLOCKLESS_ARM_KL26
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#include "../common/m0clockless.h"
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FASTLED_NAMESPACE_BEGIN
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#define FASTLED_HAS_CLOCKLESS 1
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template <uint8_t DATA_PIN, int T1, int T2, int T3, EOrder RGB_ORDER = RGB, int XTRA0 = 0, bool FLIP = false, int WAIT_TIME = 50>
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class ClocklessController : public CPixelLEDController<RGB_ORDER> {
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typedef typename FastPinBB<DATA_PIN>::port_ptr_t data_ptr_t;
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typedef typename FastPinBB<DATA_PIN>::port_t data_t;
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data_t mPinMask;
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data_ptr_t mPort;
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CMinWait<WAIT_TIME> mWait;
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public:
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virtual void init() {
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FastPinBB<DATA_PIN>::setOutput();
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mPinMask = FastPinBB<DATA_PIN>::mask();
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mPort = FastPinBB<DATA_PIN>::port();
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}
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virtual uint16_t getMaxRefreshRate() const { return 400; }
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virtual void showPixels(PixelController<RGB_ORDER> & pixels) {
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mWait.wait();
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cli();
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uint32_t clocks = showRGBInternal(pixels);
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if(!clocks) {
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sei(); delayMicroseconds(WAIT_TIME); cli();
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clocks = showRGBInternal(pixels);
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}
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long microsTaken = CLKS_TO_MICROS(clocks * ((T1 + T2 + T3) * 24));
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MS_COUNTER += (microsTaken / 1000);
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sei();
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mWait.mark();
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}
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// This method is made static to force making register Y available to use for data on AVR - if the method is non-static, then
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// gcc will use register Y for the this pointer.
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static uint32_t showRGBInternal(PixelController<RGB_ORDER> pixels) {
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struct M0ClocklessData data;
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data.d[0] = pixels.d[0];
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data.d[1] = pixels.d[1];
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data.d[2] = pixels.d[2];
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data.s[0] = pixels.mScale[0];
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data.s[1] = pixels.mScale[1];
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data.s[2] = pixels.mScale[2];
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data.e[0] = pixels.e[0];
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data.e[1] = pixels.e[1];
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data.e[2] = pixels.e[2];
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data.adj = pixels.mAdvance;
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typename FastPin<DATA_PIN>::port_ptr_t portBase = FastPin<DATA_PIN>::port();
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return showLedData<4,8,T1,T2,T3,RGB_ORDER, WAIT_TIME>(portBase, FastPin<DATA_PIN>::mask(), pixels.mData, pixels.mLen, &data);
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// return 0; // 0x00FFFFFF - _VAL;
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}
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};
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FASTLED_NAMESPACE_END
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#endif // __INC_CLOCKLESS_ARM_KL26
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@ -0,0 +1,10 @@
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#ifndef __INC_FASTLED_ARM_KL26_H
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#define __INC_FASTLED_ARM_KL26_H
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// Include the k20 headers
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#include "fastpin_arm_kl26.h"
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#include "fastspi_arm_kl26.h"
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#include "clockless_arm_kl26.h"
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#include "../k20/ws2812serial_controller.h"
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#endif
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@ -0,0 +1,88 @@
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#ifndef __FASTPIN_ARM_KL26_H
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#define __FASTPIN_ARM_KL26_H
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FASTLED_NAMESPACE_BEGIN
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#if defined(FASTLED_FORCE_SOFTWARE_PINS)
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#warning "Software pin support forced, pin access will be sloightly slower."
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#define NO_HARDWARE_PIN_SUPPORT
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#undef HAS_HARDWARE_PIN_SUPPORT
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#else
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/// Template definition for teensy LC style ARM pins, providing direct access to the various GPIO registers. Note that this
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/// uses the full port GPIO registers. In theory, in some way, bit-band register access -should- be faster, however I have found
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/// that something about the way gcc does register allocation results in the bit-band code being slower. It will need more fine tuning.
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/// The registers are data output, set output, clear output, toggle output, input, and direction
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template<uint8_t PIN, uint32_t _MASK, typename _PDOR, typename _PSOR, typename _PCOR, typename _PTOR, typename _PDIR, typename _PDDR> class _ARMPIN {
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public:
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typedef volatile uint32_t * port_ptr_t;
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typedef uint32_t port_t;
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inline static void setOutput() { pinMode(PIN, OUTPUT); } // TODO: perform MUX config { _PDDR::r() |= _MASK; }
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inline static void setInput() { pinMode(PIN, INPUT); } // TODO: preform MUX config { _PDDR::r() &= ~_MASK; }
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inline static void hi() __attribute__ ((always_inline)) { _PSOR::r() = _MASK; }
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inline static void lo() __attribute__ ((always_inline)) { _PCOR::r() = _MASK; }
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inline static void set(register port_t val) __attribute__ ((always_inline)) { _PDOR::r() = val; }
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inline static void strobe() __attribute__ ((always_inline)) { toggle(); toggle(); }
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inline static void toggle() __attribute__ ((always_inline)) { _PTOR::r() = _MASK; }
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inline static void hi(register port_ptr_t port) __attribute__ ((always_inline)) { hi(); }
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inline static void lo(register port_ptr_t port) __attribute__ ((always_inline)) { lo(); }
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inline static void fastset(register port_ptr_t port, register port_t val) __attribute__ ((always_inline)) { *port = val; }
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inline static port_t hival() __attribute__ ((always_inline)) { return _PDOR::r() | _MASK; }
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inline static port_t loval() __attribute__ ((always_inline)) { return _PDOR::r() & ~_MASK; }
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inline static port_ptr_t port() __attribute__ ((always_inline)) { return &_PDOR::r(); }
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inline static port_ptr_t sport() __attribute__ ((always_inline)) { return &_PSOR::r(); }
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inline static port_ptr_t cport() __attribute__ ((always_inline)) { return &_PCOR::r(); }
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inline static port_t mask() __attribute__ ((always_inline)) { return _MASK; }
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};
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// Macros for kl26 pin access/definition
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#define GPIO_BITBAND_ADDR(reg, bit) (((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)
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#define GPIO_BITBAND_PTR(reg, bit) ((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit)))
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#define _R(T) struct __gen_struct_ ## T
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#define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline reg32_t r() { return T; } \
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template<int BIT> static __attribute__((always_inline)) inline ptr_reg32_t rx() { return GPIO_BITBAND_PTR(T, BIT); } };
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#define _FL_IO(L,C) _RD32(FGPIO ## L ## _PDOR); _RD32(FGPIO ## L ## _PSOR); _RD32(FGPIO ## L ## _PCOR); _RD32(GPIO ## L ## _PTOR); _RD32(FGPIO ## L ## _PDIR); _RD32(FGPIO ## L ## _PDDR); _FL_DEFINE_PORT3(L,C,_R(FGPIO ## L ## _PDOR));
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#define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, 1 << BIT, _R(FGPIO ## L ## _PDOR), _R(FGPIO ## L ## _PSOR), _R(FGPIO ## L ## _PCOR), \
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_R(GPIO ## L ## _PTOR), _R(FGPIO ## L ## _PDIR), _R(FGPIO ## L ## _PDDR)> {}; \
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/* template<> class FastPinBB<PIN> : public _ARMPIN_BITBAND<PIN, BIT, _R(GPIO ## L ## _PDOR), _R(GPIO ## L ## _PSOR), _R(GPIO ## L ## _PCOR), \
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_R(GPIO ## L ## _PTOR), _R(GPIO ## L ## _PDIR), _R(GPIO ## L ## _PDDR)> {}; */
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_FL_IO(A,0); _FL_IO(B,1); _FL_IO(C,2); _FL_IO(D,3); _FL_IO(E,4);
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// Actual pin definitions
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#if defined(FASTLED_TEENSYLC) && defined(CORE_TEENSY)
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#define MAX_PIN 26
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_FL_DEFPIN(0, 16, B); _FL_DEFPIN(1, 17, B); _FL_DEFPIN(2, 0, D); _FL_DEFPIN(3, 1, A);
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_FL_DEFPIN(4, 2, A); _FL_DEFPIN(5, 7, D); _FL_DEFPIN(6, 4, D); _FL_DEFPIN(7, 2, D);
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_FL_DEFPIN(8, 3, D); _FL_DEFPIN(9, 3, C); _FL_DEFPIN(10, 4, C); _FL_DEFPIN(11, 6, C);
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_FL_DEFPIN(12, 7, C); _FL_DEFPIN(13, 5, C); _FL_DEFPIN(14, 1, D); _FL_DEFPIN(15, 0, C);
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_FL_DEFPIN(16, 0, B); _FL_DEFPIN(17, 1, B); _FL_DEFPIN(18, 3, B); _FL_DEFPIN(19, 2, B);
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_FL_DEFPIN(20, 5, D); _FL_DEFPIN(21, 6, D); _FL_DEFPIN(22, 1, C); _FL_DEFPIN(23, 2, C);
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_FL_DEFPIN(24, 20, E); _FL_DEFPIN(25, 21, E); _FL_DEFPIN(26, 30, E);
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#define SPI_DATA 11
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#define SPI_CLOCK 13
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// #define SPI1 (*(SPI_t *)0x4002D000)
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#define SPI2_DATA 0
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#define SPI2_CLOCK 20
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#define HAS_HARDWARE_PIN_SUPPORT
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#endif
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#endif // FASTLED_FORCE_SOFTWARE_PINS
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FASTLED_NAMESPACE_END
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#endif // __INC_FASTPIN_ARM_K20
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252
.pio/libdeps/local/FastLED/platforms/arm/kl26/fastspi_arm_kl26.h
Normal file
252
.pio/libdeps/local/FastLED/platforms/arm/kl26/fastspi_arm_kl26.h
Normal file
@ -0,0 +1,252 @@
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#ifndef __INC_FASTSPI_ARM_KL26_H
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#define __INC_FASTSPI_ARM_KL26_h
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FASTLED_NAMESPACE_BEGIN
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template <int VAL> void getScalars(uint8_t & sppr, uint8_t & spr) {
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if(VAL > 4096) { sppr=7; spr=8; }
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else if(VAL > 3584) { sppr=6; spr=8; }
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else if(VAL > 3072) { sppr=5; spr=8; }
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else if(VAL > 2560) { sppr=4; spr=8; }
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else if(VAL > 2048) { sppr=7; spr=7; }
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else if(VAL > 2048) { sppr=3; spr=8; }
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else if(VAL > 1792) { sppr=6; spr=7; }
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else if(VAL > 1536) { sppr=5; spr=7; }
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else if(VAL > 1536) { sppr=2; spr=8; }
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else if(VAL > 1280) { sppr=4; spr=7; }
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else if(VAL > 1024) { sppr=7; spr=6; }
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else if(VAL > 1024) { sppr=3; spr=7; }
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else if(VAL > 1024) { sppr=1; spr=8; }
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else if(VAL > 896) { sppr=6; spr=6; }
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else if(VAL > 768) { sppr=5; spr=6; }
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else if(VAL > 768) { sppr=2; spr=7; }
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else if(VAL > 640) { sppr=4; spr=6; }
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else if(VAL > 512) { sppr=7; spr=5; }
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else if(VAL > 512) { sppr=3; spr=6; }
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else if(VAL > 512) { sppr=1; spr=7; }
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else if(VAL > 512) { sppr=0; spr=8; }
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else if(VAL > 448) { sppr=6; spr=5; }
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else if(VAL > 384) { sppr=5; spr=5; }
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else if(VAL > 384) { sppr=2; spr=6; }
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else if(VAL > 320) { sppr=4; spr=5; }
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else if(VAL > 256) { sppr=7; spr=4; }
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else if(VAL > 256) { sppr=3; spr=5; }
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else if(VAL > 256) { sppr=1; spr=6; }
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else if(VAL > 256) { sppr=0; spr=7; }
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else if(VAL > 224) { sppr=6; spr=4; }
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else if(VAL > 192) { sppr=5; spr=4; }
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else if(VAL > 192) { sppr=2; spr=5; }
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else if(VAL > 160) { sppr=4; spr=4; }
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else if(VAL > 128) { sppr=7; spr=3; }
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else if(VAL > 128) { sppr=3; spr=4; }
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else if(VAL > 128) { sppr=1; spr=5; }
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else if(VAL > 128) { sppr=0; spr=6; }
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else if(VAL > 112) { sppr=6; spr=3; }
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else if(VAL > 96) { sppr=5; spr=3; }
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else if(VAL > 96) { sppr=2; spr=4; }
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else if(VAL > 80) { sppr=4; spr=3; }
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else if(VAL > 64) { sppr=7; spr=2; }
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else if(VAL > 64) { sppr=3; spr=3; }
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else if(VAL > 64) { sppr=1; spr=4; }
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else if(VAL > 64) { sppr=0; spr=5; }
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else if(VAL > 56) { sppr=6; spr=2; }
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else if(VAL > 48) { sppr=5; spr=2; }
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else if(VAL > 48) { sppr=2; spr=3; }
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else if(VAL > 40) { sppr=4; spr=2; }
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else if(VAL > 32) { sppr=7; spr=1; }
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else if(VAL > 32) { sppr=3; spr=2; }
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else if(VAL > 32) { sppr=1; spr=3; }
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else if(VAL > 32) { sppr=0; spr=4; }
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else if(VAL > 28) { sppr=6; spr=1; }
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else if(VAL > 24) { sppr=5; spr=1; }
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else if(VAL > 24) { sppr=2; spr=2; }
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else if(VAL > 20) { sppr=4; spr=1; }
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else if(VAL > 16) { sppr=7; spr=0; }
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else if(VAL > 16) { sppr=3; spr=1; }
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else if(VAL > 16) { sppr=1; spr=2; }
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else if(VAL > 16) { sppr=0; spr=3; }
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else if(VAL > 14) { sppr=6; spr=0; }
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else if(VAL > 12) { sppr=5; spr=0; }
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else if(VAL > 12) { sppr=2; spr=1; }
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else if(VAL > 10) { sppr=4; spr=0; }
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else if(VAL > 8) { sppr=3; spr=0; }
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else if(VAL > 8) { sppr=1; spr=1; }
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else if(VAL > 8) { sppr=0; spr=2; }
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else if(VAL > 6) { sppr=2; spr=0; }
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else if(VAL > 4) { sppr=1; spr=0; }
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else if(VAL > 4) { sppr=0; spr=1; }
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else /* if(VAL > 2) */ { sppr=0; spr=0; }
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}
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#define SPIX (*(KINETISL_SPI_t*)pSPIX)
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#define ARM_HARDWARE_SPI
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template <uint8_t _DATA_PIN, uint8_t _CLOCK_PIN, uint32_t _SPI_CLOCK_DIVIDER, uint32_t pSPIX>
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class ARMHardwareSPIOutput {
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Selectable *m_pSelect;
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static inline void enable_pins(void) __attribute__((always_inline)) {
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switch(_DATA_PIN) {
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case 0: CORE_PIN0_CONFIG = PORT_PCR_MUX(2); break;
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case 1: CORE_PIN1_CONFIG = PORT_PCR_MUX(5); break;
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case 7: CORE_PIN7_CONFIG = PORT_PCR_MUX(2); break;
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case 8: CORE_PIN8_CONFIG = PORT_PCR_MUX(5); break;
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case 11: CORE_PIN11_CONFIG = PORT_PCR_MUX(2); break;
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case 12: CORE_PIN12_CONFIG = PORT_PCR_MUX(5); break;
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case 21: CORE_PIN21_CONFIG = PORT_PCR_MUX(2); break;
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}
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switch(_CLOCK_PIN) {
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case 13: CORE_PIN13_CONFIG = PORT_PCR_MUX(2); break;
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case 14: CORE_PIN14_CONFIG = PORT_PCR_MUX(2); break;
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case 20: CORE_PIN20_CONFIG = PORT_PCR_MUX(2); break;
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}
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}
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static inline void disable_pins(void) __attribute((always_inline)) {
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switch(_DATA_PIN) {
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case 0: CORE_PIN0_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 1: CORE_PIN1_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 7: CORE_PIN7_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 8: CORE_PIN8_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 11: CORE_PIN11_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 12: CORE_PIN12_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 21: CORE_PIN21_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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}
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switch(_CLOCK_PIN) {
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case 13: CORE_PIN13_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 14: CORE_PIN14_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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case 20: CORE_PIN20_CONFIG = PORT_PCR_SRE | PORT_PCR_MUX(1); break;
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||||
}
|
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}
|
||||
|
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void setSPIRate() {
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uint8_t sppr, spr;
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getScalars<_SPI_CLOCK_DIVIDER>(sppr, spr);
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// Set the speed
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SPIX.BR = SPI_BR_SPPR(sppr) | SPI_BR_SPR(spr);
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// Also, force 8 bit transfers (don't want to juggle 8/16 since that flushes the world)
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SPIX.C2 = 0;
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SPIX.C1 |= SPI_C1_SPE;
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}
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public:
|
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ARMHardwareSPIOutput() { m_pSelect = NULL; }
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ARMHardwareSPIOutput(Selectable *pSelect) { m_pSelect = pSelect; }
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|
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// set the object representing the selectable
|
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void setSelect(Selectable *pSelect) { m_pSelect = pSelect; }
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||||
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// initialize the SPI subssytem
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void init() {
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FastPin<_DATA_PIN>::setOutput();
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FastPin<_CLOCK_PIN>::setOutput();
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||||
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||||
// Enable the SPI clocks
|
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uint32_t sim4 = SIM_SCGC4;
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if ((pSPIX == 0x40076000) && !(sim4 & SIM_SCGC4_SPI0)) {
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SIM_SCGC4 = sim4 | SIM_SCGC4_SPI0;
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}
|
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if ( (pSPIX == 0x40077000) && !(sim4 & SIM_SCGC4_SPI1)) {
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||||
SIM_SCGC4 = sim4 | SIM_SCGC4_SPI1;
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}
|
||||
|
||||
SPIX.C1 = SPI_C1_MSTR | SPI_C1_SPE;
|
||||
SPIX.C2 = 0;
|
||||
SPIX.BR = SPI_BR_SPPR(1) | SPI_BR_SPR(0);
|
||||
}
|
||||
|
||||
// latch the CS select
|
||||
void inline select() __attribute__((always_inline)) {
|
||||
if(m_pSelect != NULL) { m_pSelect->select(); }
|
||||
setSPIRate();
|
||||
enable_pins();
|
||||
}
|
||||
|
||||
|
||||
// release the CS select
|
||||
void inline release() __attribute__((always_inline)) {
|
||||
disable_pins();
|
||||
if(m_pSelect != NULL) { m_pSelect->release(); }
|
||||
}
|
||||
|
||||
// Wait for the world to be clear
|
||||
static void wait() __attribute__((always_inline)) { while(!(SPIX.S & SPI_S_SPTEF)); }
|
||||
|
||||
// wait until all queued up data has been written
|
||||
void waitFully() { wait(); }
|
||||
|
||||
// not the most efficient mechanism in the world - but should be enough for sm16716 and friends
|
||||
template <uint8_t BIT> inline static void writeBit(uint8_t b) { /* TODO */ }
|
||||
|
||||
// write a byte out via SPI (returns immediately on writing register)
|
||||
static void writeByte(uint8_t b) __attribute__((always_inline)) { wait(); SPIX.DL = b; }
|
||||
// write a word out via SPI (returns immediately on writing register)
|
||||
static void writeWord(uint16_t w) __attribute__((always_inline)) { writeByte(w>>8); writeByte(w & 0xFF); }
|
||||
|
||||
// A raw set of writing byte values, assumes setup/init/waiting done elsewhere (static for use by adjustment classes)
|
||||
static void writeBytesValueRaw(uint8_t value, int len) {
|
||||
while(len--) { writeByte(value); }
|
||||
}
|
||||
|
||||
// A full cycle of writing a value for len bytes, including select, release, and waiting
|
||||
void writeBytesValue(uint8_t value, int len) {
|
||||
setSPIRate();
|
||||
select();
|
||||
while(len--) {
|
||||
writeByte(value);
|
||||
}
|
||||
waitFully();
|
||||
release();
|
||||
}
|
||||
|
||||
// A full cycle of writing a raw block of data out, including select, release, and waiting
|
||||
template <class D> void writeBytes(register uint8_t *data, int len) {
|
||||
setSPIRate();
|
||||
uint8_t *end = data + len;
|
||||
select();
|
||||
// could be optimized to write 16bit words out instead of 8bit bytes
|
||||
while(data != end) {
|
||||
writeByte(D::adjust(*data++));
|
||||
}
|
||||
D::postBlock(len);
|
||||
waitFully();
|
||||
release();
|
||||
}
|
||||
|
||||
void writeBytes(register uint8_t *data, int len) { writeBytes<DATA_NOP>(data, len); }
|
||||
|
||||
|
||||
template <uint8_t FLAGS, class D, EOrder RGB_ORDER> void writePixels(PixelController<RGB_ORDER> pixels) {
|
||||
int len = pixels.mLen;
|
||||
|
||||
select();
|
||||
while(pixels.has(1)) {
|
||||
if(FLAGS & FLAG_START_BIT) {
|
||||
writeBit<0>(1);
|
||||
writeByte(D::adjust(pixels.loadAndScale0()));
|
||||
writeByte(D::adjust(pixels.loadAndScale1()));
|
||||
writeByte(D::adjust(pixels.loadAndScale2()));
|
||||
} else {
|
||||
writeByte(D::adjust(pixels.loadAndScale0()));
|
||||
writeByte(D::adjust(pixels.loadAndScale1()));
|
||||
writeByte(D::adjust(pixels.loadAndScale2()));
|
||||
}
|
||||
|
||||
pixels.advanceData();
|
||||
pixels.stepDithering();
|
||||
}
|
||||
D::postBlock(len);
|
||||
release();
|
||||
}
|
||||
|
||||
};
|
||||
|
||||
FASTLED_NAMESPACE_END
|
||||
|
||||
#endif
|
||||
@ -0,0 +1,47 @@
|
||||
#ifndef __INC_LED_SYSDEFS_ARM_KL26_H
|
||||
#define __INC_LED_SYSDEFS_ARM_KL26_H
|
||||
|
||||
#define FASTLED_TEENSYLC
|
||||
#define FASTLED_ARM
|
||||
#define FASTLED_ARM_M0_PLUS
|
||||
|
||||
#ifndef INTERRUPT_THRESHOLD
|
||||
#define INTERRUPT_THRESHOLD 1
|
||||
#endif
|
||||
|
||||
#define FASTLED_SPI_BYTE_ONLY
|
||||
|
||||
// Default to allowing interrupts
|
||||
#ifndef FASTLED_ALLOW_INTERRUPTS
|
||||
// #define FASTLED_ALLOW_INTERRUPTS 1
|
||||
#endif
|
||||
|
||||
#if FASTLED_ALLOW_INTERRUPTS == 1
|
||||
#define FASTLED_ACCURATE_CLOCK
|
||||
#endif
|
||||
|
||||
#if (F_CPU == 96000000)
|
||||
#define CLK_DBL 1
|
||||
#endif
|
||||
|
||||
// Get some system include files
|
||||
#include <avr/io.h>
|
||||
#include <avr/interrupt.h> // for cli/se definitions
|
||||
|
||||
// Define the register types
|
||||
#if defined(ARDUINO) // && ARDUINO < 150
|
||||
typedef volatile uint8_t RoReg; /**< Read only 8-bit register (volatile const unsigned int) */
|
||||
typedef volatile uint8_t RwReg; /**< Read-Write 8-bit register (volatile unsigned int) */
|
||||
#endif
|
||||
|
||||
extern volatile uint32_t systick_millis_count;
|
||||
# define MS_COUNTER systick_millis_count
|
||||
|
||||
// Default to using PROGMEM since TEENSYLC provides it
|
||||
// even though all it does is ignore it. Just being
|
||||
// conservative here in case TEENSYLC changes.
|
||||
#ifndef FASTLED_USE_PROGMEM
|
||||
#define FASTLED_USE_PROGMEM 1
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user