683 lines
19 KiB
C
683 lines
19 KiB
C
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#ifndef __INC_FASTSPI_AVR_H
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#define __INC_FASTSPI_AVR_H
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FASTLED_NAMESPACE_BEGIN
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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//
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// Hardware SPI support using USART registers and friends
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//
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// TODO: Complete/test implementation - right now this doesn't work
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//
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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// uno/mini/duemilanove
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#if defined(AVR_HARDWARE_SPI)
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#if defined(UBRR1)
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#ifndef UCPHA1
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#define UCPHA1 1
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#endif
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template <uint8_t _DATA_PIN, uint8_t _CLOCK_PIN, uint32_t _SPI_CLOCK_DIVIDER>
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class AVRUSART1SPIOutput {
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Selectable *m_pSelect;
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public:
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AVRUSART1SPIOutput() { m_pSelect = NULL; }
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AVRUSART1SPIOutput(Selectable *pSelect) { m_pSelect = pSelect; }
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void setSelect(Selectable *pSelect) { m_pSelect = pSelect; }
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void init() {
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UBRR1 = 0;
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/* Set MSPI mode of operation and SPI data mode 0. */
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UCSR1C = (1<<UMSEL11)|(1<<UMSEL10)|(0<<UCPHA1)|(0<<UCPOL1);
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/* Enable receiver and transmitter. */
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UCSR1B = (1<<RXEN1)|(1<<TXEN1);
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FastPin<_CLOCK_PIN>::setOutput();
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FastPin<_DATA_PIN>::setOutput();
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// must be done last, see page 206
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setSPIRate();
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}
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void setSPIRate() {
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if(_SPI_CLOCK_DIVIDER > 2) {
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UBRR1 = (_SPI_CLOCK_DIVIDER/2)-1;
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} else {
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UBRR1 = 0;
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}
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}
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static void stop() {
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// TODO: stop the uart spi output
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}
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static bool shouldWait(bool wait = false) __attribute__((always_inline)) {
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static bool sWait=false;
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if(sWait) {
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sWait = wait; return true;
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} else {
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sWait = wait; return false;
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}
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// return true;
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}
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static void wait() __attribute__((always_inline)) {
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if(shouldWait()) {
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while(!(UCSR1A & (1<<UDRE1)));
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}
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}
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static void waitFully() __attribute__((always_inline)) { wait(); }
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static void writeWord(uint16_t w) __attribute__((always_inline)) { writeByte(w>>8); writeByte(w&0xFF); }
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static void writeByte(uint8_t b) __attribute__((always_inline)) { wait(); UDR1=b; shouldWait(true); }
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static void writeBytePostWait(uint8_t b) __attribute__((always_inline)) { UDR1=b; shouldWait(true); wait(); }
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static void writeByteNoWait(uint8_t b) __attribute__((always_inline)) { UDR1=b; shouldWait(true); }
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template <uint8_t BIT> inline static void writeBit(uint8_t b) {
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if(b && (1 << BIT)) {
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FastPin<_DATA_PIN>::hi();
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} else {
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FastPin<_DATA_PIN>::lo();
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}
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FastPin<_CLOCK_PIN>::hi();
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FastPin<_CLOCK_PIN>::lo();
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}
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void enable_pins() { }
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void disable_pins() { }
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void select() {
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if(m_pSelect != NULL) {
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m_pSelect->select();
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}
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enable_pins();
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setSPIRate();
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}
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void release() {
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if(m_pSelect != NULL) {
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m_pSelect->release();
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}
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disable_pins();
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}
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static void writeBytesValueRaw(uint8_t value, int len) {
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while(len--) {
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writeByte(value);
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}
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}
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void writeBytesValue(uint8_t value, int len) {
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//setSPIRate();
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select();
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while(len--) {
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writeByte(value);
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}
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release();
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}
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// Write a block of n uint8_ts out
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template <class D> void writeBytes(register uint8_t *data, int len) {
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//setSPIRate();
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uint8_t *end = data + len;
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select();
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while(data != end) {
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// a slight touch of delay here helps optimize the timing of the status register check loop (not used on ARM)
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writeByte(D::adjust(*data++)); delaycycles<3>();
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}
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release();
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}
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void writeBytes(register uint8_t *data, int len) { writeBytes<DATA_NOP>(data, len); }
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// write a block of uint8_ts out in groups of three. len is the total number of uint8_ts to write out. The template
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// parameters indicate how many uint8_ts to skip at the beginning and/or end of each grouping
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template <uint8_t FLAGS, class D, EOrder RGB_ORDER> void writePixels(PixelController<RGB_ORDER> pixels) {
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//setSPIRate();
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int len = pixels.mLen;
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select();
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while(pixels.has(1)) {
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if(FLAGS & FLAG_START_BIT) {
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writeBit<0>(1);
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writeBytePostWait(D::adjust(pixels.loadAndScale0()));
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writeBytePostWait(D::adjust(pixels.loadAndScale1()));
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writeBytePostWait(D::adjust(pixels.loadAndScale2()));
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} else {
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writeByte(D::adjust(pixels.loadAndScale0()));
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writeByte(D::adjust(pixels.loadAndScale1()));
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writeByte(D::adjust(pixels.loadAndScale2()));
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}
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pixels.advanceData();
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pixels.stepDithering();
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}
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D::postBlock(len);
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release();
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}
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};
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#endif
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#if defined(UBRR0)
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template <uint8_t _DATA_PIN, uint8_t _CLOCK_PIN, uint32_t _SPI_CLOCK_DIVIDER>
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class AVRUSART0SPIOutput {
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Selectable *m_pSelect;
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public:
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AVRUSART0SPIOutput() { m_pSelect = NULL; }
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AVRUSART0SPIOutput(Selectable *pSelect) { m_pSelect = pSelect; }
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void setSelect(Selectable *pSelect) { m_pSelect = pSelect; }
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void init() {
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UBRR0 = 0;
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/* Set MSPI mode of operation and SPI data mode 0. */
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UCSR0C = (1<<UMSEL01)|(1<<UMSEL00)/*|(0<<UCPHA0)*/|(0<<UCPOL0);
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/* Enable receiver and transmitter. */
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UCSR0B = (1<<RXEN0)|(1<<TXEN0);
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FastPin<_CLOCK_PIN>::setOutput();
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FastPin<_DATA_PIN>::setOutput();
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// must be done last, see page 206
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setSPIRate();
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}
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void setSPIRate() {
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if(_SPI_CLOCK_DIVIDER > 2) {
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UBRR0 = (_SPI_CLOCK_DIVIDER/2)-1;
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} else {
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UBRR0 = 0;
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}
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}
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static void stop() {
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// TODO: stop the uart spi output
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}
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static bool shouldWait(bool wait = false) __attribute__((always_inline)) {
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static bool sWait=false;
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if(sWait) {
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sWait = wait; return true;
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} else {
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sWait = wait; return false;
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}
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// return true;
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}
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static void wait() __attribute__((always_inline)) {
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if(shouldWait()) {
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while(!(UCSR0A & (1<<UDRE0)));
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}
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}
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static void waitFully() __attribute__((always_inline)) { wait(); }
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static void writeWord(uint16_t w) __attribute__((always_inline)) { writeByte(w>>8); writeByte(w&0xFF); }
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static void writeByte(uint8_t b) __attribute__((always_inline)) { wait(); UDR0=b; shouldWait(true); }
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static void writeBytePostWait(uint8_t b) __attribute__((always_inline)) { UDR0=b; shouldWait(true); wait(); }
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static void writeByteNoWait(uint8_t b) __attribute__((always_inline)) { UDR0=b; shouldWait(true); }
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template <uint8_t BIT> inline static void writeBit(uint8_t b) {
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if(b && (1 << BIT)) {
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FastPin<_DATA_PIN>::hi();
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} else {
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FastPin<_DATA_PIN>::lo();
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}
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FastPin<_CLOCK_PIN>::hi();
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FastPin<_CLOCK_PIN>::lo();
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}
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void enable_pins() { }
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void disable_pins() { }
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void select() {
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if(m_pSelect != NULL) {
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m_pSelect->select();
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}
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enable_pins();
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setSPIRate();
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}
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void release() {
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if(m_pSelect != NULL) {
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m_pSelect->release();
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}
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disable_pins();
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}
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static void writeBytesValueRaw(uint8_t value, int len) {
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while(len--) {
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writeByte(value);
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}
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}
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void writeBytesValue(uint8_t value, int len) {
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//setSPIRate();
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select();
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while(len--) {
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writeByte(value);
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}
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release();
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}
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// Write a block of n uint8_ts out
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template <class D> void writeBytes(register uint8_t *data, int len) {
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//setSPIRate();
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uint8_t *end = data + len;
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select();
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while(data != end) {
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// a slight touch of delay here helps optimize the timing of the status register check loop (not used on ARM)
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writeByte(D::adjust(*data++)); delaycycles<3>();
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}
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release();
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}
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void writeBytes(register uint8_t *data, int len) { writeBytes<DATA_NOP>(data, len); }
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// write a block of uint8_ts out in groups of three. len is the total number of uint8_ts to write out. The template
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// parameters indicate how many uint8_ts to skip at the beginning and/or end of each grouping
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template <uint8_t FLAGS, class D, EOrder RGB_ORDER> void writePixels(PixelController<RGB_ORDER> pixels) {
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//setSPIRate();
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int len = pixels.mLen;
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select();
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while(pixels.has(1)) {
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if(FLAGS & FLAG_START_BIT) {
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writeBit<0>(1);
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writeBytePostWait(D::adjust(pixels.loadAndScale0()));
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writeBytePostWait(D::adjust(pixels.loadAndScale1()));
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writeBytePostWait(D::adjust(pixels.loadAndScale2()));
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} else {
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writeByte(D::adjust(pixels.loadAndScale0()));
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writeByte(D::adjust(pixels.loadAndScale1()));
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writeByte(D::adjust(pixels.loadAndScale2()));
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}
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pixels.advanceData();
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pixels.stepDithering();
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}
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D::postBlock(len);
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waitFully();
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release();
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}
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};
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#endif
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#if defined(SPSR)
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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//
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// Hardware SPI support using SPDR registers and friends
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//
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// Technically speaking, this uses the AVR SPI registers. This will work on the Teensy 3.0 because Paul made a set of compatability
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// classes that map the AVR SPI registers to ARM's, however this caps the performance of output.
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//
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// TODO: implement ARMHardwareSPIOutput
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//
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//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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template <uint8_t _DATA_PIN, uint8_t _CLOCK_PIN, uint32_t _SPI_CLOCK_DIVIDER>
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class AVRHardwareSPIOutput {
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Selectable *m_pSelect;
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bool mWait;
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public:
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AVRHardwareSPIOutput() { m_pSelect = NULL; mWait = false;}
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AVRHardwareSPIOutput(Selectable *pSelect) { m_pSelect = pSelect; }
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void setSelect(Selectable *pSelect) { m_pSelect = pSelect; }
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void setSPIRate() {
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SPCR &= ~ ( (1<<SPR1) | (1<<SPR0) ); // clear out the prescalar bits
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bool b2x = false;
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if(_SPI_CLOCK_DIVIDER >= 128) { SPCR |= (1<<SPR1); SPCR |= (1<<SPR0); }
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else if(_SPI_CLOCK_DIVIDER >= 64) { SPCR |= (1<<SPR1);}
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else if(_SPI_CLOCK_DIVIDER >= 32) { SPCR |= (1<<SPR1); b2x = true; }
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else if(_SPI_CLOCK_DIVIDER >= 16) { SPCR |= (1<<SPR0); }
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else if(_SPI_CLOCK_DIVIDER >= 8) { SPCR |= (1<<SPR0); b2x = true; }
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else if(_SPI_CLOCK_DIVIDER >= 4) { /* do nothing - default rate */ }
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else { b2x = true; }
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if(b2x) { SPSR |= (1<<SPI2X); }
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else { SPSR &= ~ (1<<SPI2X); }
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}
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void init() {
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volatile uint8_t clr;
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// set the pins to output
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FastPin<_DATA_PIN>::setOutput();
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FastPin<_CLOCK_PIN>::setOutput();
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#ifdef SPI_SELECT
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// Make sure the slave select line is set to output, or arduino will block us
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FastPin<SPI_SELECT>::setOutput();
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FastPin<SPI_SELECT>::lo();
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#endif
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SPCR |= ((1<<SPE) | (1<<MSTR) ); // enable SPI as master
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SPCR &= ~ ( (1<<SPR1) | (1<<SPR0) ); // clear out the prescalar bits
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clr = SPSR; // clear SPI status register
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clr = SPDR; // clear SPI data register
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clr;
|
||
|
|
|
||
|
|
bool b2x = false;
|
||
|
|
|
||
|
|
if(_SPI_CLOCK_DIVIDER >= 128) { SPCR |= (1<<SPR1); SPCR |= (1<<SPR0); }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 64) { SPCR |= (1<<SPR1);}
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 32) { SPCR |= (1<<SPR1); b2x = true; }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 16) { SPCR |= (1<<SPR0); }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 8) { SPCR |= (1<<SPR0); b2x = true; }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 4) { /* do nothing - default rate */ }
|
||
|
|
else { b2x = true; }
|
||
|
|
|
||
|
|
if(b2x) { SPSR |= (1<<SPI2X); }
|
||
|
|
else { SPSR &= ~ (1<<SPI2X); }
|
||
|
|
|
||
|
|
SPDR=0;
|
||
|
|
shouldWait(false);
|
||
|
|
release();
|
||
|
|
}
|
||
|
|
|
||
|
|
static bool shouldWait(bool wait = false) __attribute__((always_inline)) {
|
||
|
|
static bool sWait=false;
|
||
|
|
if(sWait) { sWait = wait; return true; } else { sWait = wait; return false; }
|
||
|
|
// return true;
|
||
|
|
}
|
||
|
|
static void wait() __attribute__((always_inline)) { if(shouldWait()) { while(!(SPSR & (1<<SPIF))); } }
|
||
|
|
static void waitFully() __attribute__((always_inline)) { wait(); }
|
||
|
|
|
||
|
|
static void writeWord(uint16_t w) __attribute__((always_inline)) { writeByte(w>>8); writeByte(w&0xFF); }
|
||
|
|
|
||
|
|
static void writeByte(uint8_t b) __attribute__((always_inline)) { wait(); SPDR=b; shouldWait(true); }
|
||
|
|
static void writeBytePostWait(uint8_t b) __attribute__((always_inline)) { SPDR=b; shouldWait(true); wait(); }
|
||
|
|
static void writeByteNoWait(uint8_t b) __attribute__((always_inline)) { SPDR=b; shouldWait(true); }
|
||
|
|
|
||
|
|
template <uint8_t BIT> inline static void writeBit(uint8_t b) {
|
||
|
|
SPCR &= ~(1 << SPE);
|
||
|
|
if(b & (1 << BIT)) {
|
||
|
|
FastPin<_DATA_PIN>::hi();
|
||
|
|
} else {
|
||
|
|
FastPin<_DATA_PIN>::lo();
|
||
|
|
}
|
||
|
|
|
||
|
|
FastPin<_CLOCK_PIN>::hi();
|
||
|
|
FastPin<_CLOCK_PIN>::lo();
|
||
|
|
SPCR |= 1 << SPE;
|
||
|
|
shouldWait(false);
|
||
|
|
}
|
||
|
|
|
||
|
|
void enable_pins() {
|
||
|
|
SPCR |= ((1<<SPE) | (1<<MSTR) ); // enable SPI as master
|
||
|
|
}
|
||
|
|
|
||
|
|
void disable_pins() {
|
||
|
|
SPCR &= ~(((1<<SPE) | (1<<MSTR) )); // disable SPI
|
||
|
|
}
|
||
|
|
|
||
|
|
void select() {
|
||
|
|
if(m_pSelect != NULL) { m_pSelect->select(); }
|
||
|
|
enable_pins();
|
||
|
|
setSPIRate();
|
||
|
|
}
|
||
|
|
|
||
|
|
void release() {
|
||
|
|
if(m_pSelect != NULL) { m_pSelect->release(); }
|
||
|
|
disable_pins();
|
||
|
|
}
|
||
|
|
|
||
|
|
static void writeBytesValueRaw(uint8_t value, int len) {
|
||
|
|
while(len--) { writeByte(value); }
|
||
|
|
}
|
||
|
|
|
||
|
|
void writeBytesValue(uint8_t value, int len) {
|
||
|
|
//setSPIRate();
|
||
|
|
select();
|
||
|
|
while(len--) {
|
||
|
|
writeByte(value);
|
||
|
|
}
|
||
|
|
release();
|
||
|
|
}
|
||
|
|
|
||
|
|
// Write a block of n uint8_ts out
|
||
|
|
template <class D> void writeBytes(register uint8_t *data, int len) {
|
||
|
|
//setSPIRate();
|
||
|
|
uint8_t *end = data + len;
|
||
|
|
select();
|
||
|
|
while(data != end) {
|
||
|
|
// a slight touch of delay here helps optimize the timing of the status register check loop (not used on ARM)
|
||
|
|
writeByte(D::adjust(*data++)); delaycycles<3>();
|
||
|
|
}
|
||
|
|
release();
|
||
|
|
}
|
||
|
|
|
||
|
|
void writeBytes(register uint8_t *data, int len) { writeBytes<DATA_NOP>(data, len); }
|
||
|
|
|
||
|
|
// write a block of uint8_ts out in groups of three. len is the total number of uint8_ts to write out. The template
|
||
|
|
// parameters indicate how many uint8_ts to skip at the beginning and/or end of each grouping
|
||
|
|
template <uint8_t FLAGS, class D, EOrder RGB_ORDER> void writePixels(PixelController<RGB_ORDER> pixels) {
|
||
|
|
//setSPIRate();
|
||
|
|
int len = pixels.mLen;
|
||
|
|
|
||
|
|
select();
|
||
|
|
while(pixels.has(1)) {
|
||
|
|
if(FLAGS & FLAG_START_BIT) {
|
||
|
|
writeBit<0>(1);
|
||
|
|
writeBytePostWait(D::adjust(pixels.loadAndScale0()));
|
||
|
|
writeBytePostWait(D::adjust(pixels.loadAndScale1()));
|
||
|
|
writeBytePostWait(D::adjust(pixels.loadAndScale2()));
|
||
|
|
} else {
|
||
|
|
writeByte(D::adjust(pixels.loadAndScale0()));
|
||
|
|
writeByte(D::adjust(pixels.loadAndScale1()));
|
||
|
|
writeByte(D::adjust(pixels.loadAndScale2()));
|
||
|
|
}
|
||
|
|
|
||
|
|
pixels.advanceData();
|
||
|
|
pixels.stepDithering();
|
||
|
|
}
|
||
|
|
D::postBlock(len);
|
||
|
|
waitFully();
|
||
|
|
release();
|
||
|
|
}
|
||
|
|
};
|
||
|
|
#elif defined(SPSR0)
|
||
|
|
|
||
|
|
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||
|
|
//
|
||
|
|
// Hardware SPI support using SPDR0 registers and friends
|
||
|
|
//
|
||
|
|
// Technically speaking, this uses the AVR SPI registers. This will work on the Teensy 3.0 because Paul made a set of compatability
|
||
|
|
// classes that map the AVR SPI registers to ARM's, however this caps the performance of output.
|
||
|
|
//
|
||
|
|
// TODO: implement ARMHardwareSPIOutput
|
||
|
|
//
|
||
|
|
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
||
|
|
|
||
|
|
template <uint8_t _DATA_PIN, uint8_t _CLOCK_PIN, uint32_t _SPI_CLOCK_DIVIDER>
|
||
|
|
class AVRHardwareSPIOutput {
|
||
|
|
Selectable *m_pSelect;
|
||
|
|
bool mWait;
|
||
|
|
public:
|
||
|
|
AVRHardwareSPIOutput() { m_pSelect = NULL; mWait = false;}
|
||
|
|
AVRHardwareSPIOutput(Selectable *pSelect) { m_pSelect = pSelect; }
|
||
|
|
void setSelect(Selectable *pSelect) { m_pSelect = pSelect; }
|
||
|
|
|
||
|
|
void setSPIRate() {
|
||
|
|
SPCR0 &= ~ ( (1<<SPR10) | (1<<SPR0) ); // clear out the prescalar bits
|
||
|
|
|
||
|
|
bool b2x = false;
|
||
|
|
|
||
|
|
if(_SPI_CLOCK_DIVIDER >= 128) { SPCR0 |= (1<<SPR1); SPCR0 |= (1<<SPR0); }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 64) { SPCR0 |= (1<<SPR1);}
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 32) { SPCR0 |= (1<<SPR1); b2x = true; }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 16) { SPCR0 |= (1<<SPR0); }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 8) { SPCR0 |= (1<<SPR0); b2x = true; }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 4) { /* do nothing - default rate */ }
|
||
|
|
else { b2x = true; }
|
||
|
|
|
||
|
|
if(b2x) { SPSR0 |= (1<<SPI2X); }
|
||
|
|
else { SPSR0 &= ~ (1<<SPI2X); }
|
||
|
|
}
|
||
|
|
|
||
|
|
void init() {
|
||
|
|
volatile uint8_t clr;
|
||
|
|
|
||
|
|
// set the pins to output
|
||
|
|
FastPin<_DATA_PIN>::setOutput();
|
||
|
|
FastPin<_CLOCK_PIN>::setOutput();
|
||
|
|
#ifdef SPI_SELECT
|
||
|
|
// Make sure the slave select line is set to output, or arduino will block us
|
||
|
|
FastPin<SPI_SELECT>::setOutput();
|
||
|
|
FastPin<SPI_SELECT>::lo();
|
||
|
|
#endif
|
||
|
|
|
||
|
|
SPCR0 |= ((1<<SPE) | (1<<MSTR) ); // enable SPI as master
|
||
|
|
SPCR0 &= ~ ( (1<<SPR1) | (1<<SPR0) ); // clear out the prescalar bits
|
||
|
|
|
||
|
|
clr = SPSR0; // clear SPI status register
|
||
|
|
clr = SPDR0; // clear SPI data register
|
||
|
|
clr;
|
||
|
|
|
||
|
|
bool b2x = false;
|
||
|
|
|
||
|
|
if(_SPI_CLOCK_DIVIDER >= 128) { SPCR0 |= (1<<SPR1); SPCR0 |= (1<<SPR0); }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 64) { SPCR0 |= (1<<SPR1);}
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 32) { SPCR0 |= (1<<SPR1); b2x = true; }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 16) { SPCR0 |= (1<<SPR0); }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 8) { SPCR0 |= (1<<SPR0); b2x = true; }
|
||
|
|
else if(_SPI_CLOCK_DIVIDER >= 4) { /* do nothing - default rate */ }
|
||
|
|
else { b2x = true; }
|
||
|
|
|
||
|
|
if(b2x) { SPSR0 |= (1<<SPI2X); }
|
||
|
|
else { SPSR0 &= ~ (1<<SPI2X); }
|
||
|
|
|
||
|
|
SPDR0=0;
|
||
|
|
shouldWait(false);
|
||
|
|
release();
|
||
|
|
}
|
||
|
|
|
||
|
|
static bool shouldWait(bool wait = false) __attribute__((always_inline)) {
|
||
|
|
static bool sWait=false;
|
||
|
|
if(sWait) { sWait = wait; return true; } else { sWait = wait; return false; }
|
||
|
|
// return true;
|
||
|
|
}
|
||
|
|
static void wait() __attribute__((always_inline)) { if(shouldWait()) { while(!(SPSR0 & (1<<SPIF))); } }
|
||
|
|
static void waitFully() __attribute__((always_inline)) { wait(); }
|
||
|
|
|
||
|
|
static void writeWord(uint16_t w) __attribute__((always_inline)) { writeByte(w>>8); writeByte(w&0xFF); }
|
||
|
|
|
||
|
|
static void writeByte(uint8_t b) __attribute__((always_inline)) { wait(); SPDR0=b; shouldWait(true); }
|
||
|
|
static void writeBytePostWait(uint8_t b) __attribute__((always_inline)) { SPDR0=b; shouldWait(true); wait(); }
|
||
|
|
static void writeByteNoWait(uint8_t b) __attribute__((always_inline)) { SPDR0=b; shouldWait(true); }
|
||
|
|
|
||
|
|
template <uint8_t BIT> inline static void writeBit(uint8_t b) {
|
||
|
|
SPCR0 &= ~(1 << SPE);
|
||
|
|
if(b & (1 << BIT)) {
|
||
|
|
FastPin<_DATA_PIN>::hi();
|
||
|
|
} else {
|
||
|
|
FastPin<_DATA_PIN>::lo();
|
||
|
|
}
|
||
|
|
|
||
|
|
FastPin<_CLOCK_PIN>::hi();
|
||
|
|
FastPin<_CLOCK_PIN>::lo();
|
||
|
|
SPCR0 |= 1 << SPE;
|
||
|
|
shouldWait(false);
|
||
|
|
}
|
||
|
|
|
||
|
|
void enable_pins() {
|
||
|
|
SPCR0 |= ((1<<SPE) | (1<<MSTR) ); // enable SPI as master
|
||
|
|
}
|
||
|
|
|
||
|
|
void disable_pins() {
|
||
|
|
SPCR0 &= ~(((1<<SPE) | (1<<MSTR) )); // disable SPI
|
||
|
|
}
|
||
|
|
|
||
|
|
void select() {
|
||
|
|
if(m_pSelect != NULL) { m_pSelect->select(); }
|
||
|
|
enable_pins();
|
||
|
|
setSPIRate();
|
||
|
|
}
|
||
|
|
|
||
|
|
void release() {
|
||
|
|
if(m_pSelect != NULL) { m_pSelect->release(); }
|
||
|
|
disable_pins();
|
||
|
|
}
|
||
|
|
|
||
|
|
static void writeBytesValueRaw(uint8_t value, int len) {
|
||
|
|
while(len--) { writeByte(value); }
|
||
|
|
}
|
||
|
|
|
||
|
|
void writeBytesValue(uint8_t value, int len) {
|
||
|
|
//setSPIRate();
|
||
|
|
select();
|
||
|
|
while(len--) {
|
||
|
|
writeByte(value);
|
||
|
|
}
|
||
|
|
release();
|
||
|
|
}
|
||
|
|
|
||
|
|
// Write a block of n uint8_ts out
|
||
|
|
template <class D> void writeBytes(register uint8_t *data, int len) {
|
||
|
|
//setSPIRate();
|
||
|
|
uint8_t *end = data + len;
|
||
|
|
select();
|
||
|
|
while(data != end) {
|
||
|
|
// a slight touch of delay here helps optimize the timing of the status register check loop (not used on ARM)
|
||
|
|
writeByte(D::adjust(*data++)); delaycycles<3>();
|
||
|
|
}
|
||
|
|
release();
|
||
|
|
}
|
||
|
|
|
||
|
|
void writeBytes(register uint8_t *data, int len) { writeBytes<DATA_NOP>(data, len); }
|
||
|
|
|
||
|
|
// write a block of uint8_ts out in groups of three. len is the total number of uint8_ts to write out. The template
|
||
|
|
// parameters indicate how many uint8_ts to skip at the beginning and/or end of each grouping
|
||
|
|
template <uint8_t FLAGS, class D, EOrder RGB_ORDER> void writePixels(PixelController<RGB_ORDER> pixels) {
|
||
|
|
//setSPIRate();
|
||
|
|
int len = pixels.mLen;
|
||
|
|
|
||
|
|
select();
|
||
|
|
while(pixels.has(1)) {
|
||
|
|
if(FLAGS & FLAG_START_BIT) {
|
||
|
|
writeBit<0>(1);
|
||
|
|
writeBytePostWait(D::adjust(pixels.loadAndScale0()));
|
||
|
|
writeBytePostWait(D::adjust(pixels.loadAndScale1()));
|
||
|
|
writeBytePostWait(D::adjust(pixels.loadAndScale2()));
|
||
|
|
} else {
|
||
|
|
writeByte(D::adjust(pixels.loadAndScale0()));
|
||
|
|
writeByte(D::adjust(pixels.loadAndScale1()));
|
||
|
|
writeByte(D::adjust(pixels.loadAndScale2()));
|
||
|
|
}
|
||
|
|
|
||
|
|
pixels.advanceData();
|
||
|
|
pixels.stepDithering();
|
||
|
|
}
|
||
|
|
D::postBlock(len);
|
||
|
|
waitFully();
|
||
|
|
release();
|
||
|
|
}
|
||
|
|
};
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#else
|
||
|
|
// #define FASTLED_FORCE_SOFTWARE_SPI
|
||
|
|
#endif
|
||
|
|
|
||
|
|
FASTLED_NAMESPACE_END;
|
||
|
|
|
||
|
|
|
||
|
|
#endif
|